|
| |
Lock Bus
|
86/88 |
Y |
186 |
Y |
286 |
Y |
386 |
Y |
486 |
Y |
LOCK |
|
Ovfl |
N |
Dir |
N |
Int |
N |
Trap |
N |
Sign |
N |
Zero |
N |
Aux |
N |
Prty |
N |
Carry |
N |
LOCK is a one-byte prefix that can precede any instruction. LOCK
causes the processor to assert its bus lock signal while the
instruction that follows is executed. If the system is configured such
that the LOCK signal is used, it prevents any external device or event
from accessing the bus, including interrupts and DMA transfers.
Notes: This instruction was provided to support multiple
processor systems with shared resources. In such a
system, access to those resources is generally
controlled via a software-hardware combination using
semaphores.
This instruction should only be used to prevent
other bus masters from interrupting a data movement
operation. This prefix should only be used with
XCHG, MOV, and MOVS.
------------------------------------ Timing ----------------------------------
OpCode Instruction 386 286 86
F0 LOCK 0 0 2
------------------------------------ Logic -----------------------------------
LOCK signal on CPU asserted
See Also HLT WAIT |