Wait in BUSY# Pin is Inactive (High)                     

86/88

Y

186

Y

286

Y

386

Y

486

Y

WAIT

Ovfl

N

Dir

N

Int

N

Trap

N

Sign

N

Zero

N

Aux

N

Prty

N

Carry

N

    WAIT causes the processor to enter a wait state. The processor will
    remain inactive until the TEST input on the microprocessor is driven
    active.

       Note:          This instruction is used to synchronize external
                      hardware, such as a coprocessor.

------------------------------------ Timing ----------------------------------

OpCode          Instruction             386     286     86
9B              WAIT                    6       3       4+5n

See Also HLT LOCK


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