|
| |
Rotate through Carry Right
|
86/88 |
Y |
186 |
Y |
286 |
Y |
386 |
Y |
486 |
Y |
RCR destination, source |
|
Ovfl |
Y |
Dir |
N |
Int |
N |
Trap |
N |
Sign |
N |
Zero |
N |
Aux |
N |
Prty |
N |
Carry |
Y |
+-------------------------+
| |
+->> Destination -->> CF
RCR shifts the word or byte at the destination to the right by the
number of bit positions specified in the second operand, COUNT. A bit
shifted out of the right (low-order) end of the destination enters the
carry flag, and the displaced carry flag rotates around to enter the
vacated left-most bit position of the destination. This "bit rotation"
continues the number of times specified in COUNT. (Another way of
looking at this is to consider the carry flag as the lowest order bit
of the word being rotated.)
If COUNT is not equal to 1, the Overflow flag is undefined. If COUNT
is equal to 1, the Overflow Flag is set to the XOR of the top 2 bits
of the result.
Notes: COUNT is normally taken as the value in CL. If,
however, you wish to rotate only one position,
replace the second operand, CL, with the value 1, as
shown in the first example above.
The 80286 and 80386 microprocessors limit the COUNT
value to 31. If COUNT is greater than 31, these
microprocessors use COUNT MOD 32 to produce a new
COUNT between 0 and 31. This upper bound exists to
limit the amount of time an interrupt response will
be delayed waiting for the instruction to complete.
Multiple RCRs that use 1 as the COUNT may be faster
and require less memory than a single RCR that uses
CL for COUNT.
The overflow flag is undefined if the rotate count
is greater than 1.
------------------------------------ Timing ----------------------------------
OpCode Instruction 386 286 86
D0/3 RCR r/m8,1 9/10 2/7 2/15+EA
D2/3 RCR r/m8,CL 9/10 5/8 8/20+4/bit
C0/3 ib RCR r/m8,imm8 9/10 5/8
D1/3 RCR r/m16,1 9/10 2/7 2/15+EA
D3/3 RCR r/m16,CL 9/10 5/8 8/20+4/bit
C1/3 ib RCR r/m16,imm8 9/10 5/8
D1/3 RCR r/m32,1 9/10
D3/3 RCR r/m32,CL 9/10
C1/3 ib RCR r/m32,imm8 9/10
See Also ROR RCL ROL SAR SHR SHL SAL Flags |